Embodiments of the present invention relate to a resistance device of a semiconductor device, and more particularly to a variable resistance device in which conductive lines are arranged parallel to the direction of a current over an impurity region.
Typically, a variable resistor for use in an integrated circuit (IC) is formed using a MOS transistor structure. In the MOS transistor structure, a voltage (Vc) is applied to a gate electrode of a MOS transistor formed over a P-type semiconductor substrate, and a voltage (Vi) and a voltage (Vo) are respectively applied to a diffusion layer serving as a source region of the MOS transistor and a diffusion layer serving as a drain region of the MOS transistor. The gate voltage (Vc) is changed as denoted by (Vo−Vi)<<(Vc−Vth) to adjust a resistance value of a channel between the source region and the drain region, (Vth) being a threshold voltage of the MOS transistor. That is, a gate is formed to cross a current direction (source⇄drain), and the gate voltage (Vc) is changed such that the channel resistance value between the source region and the drain region is changed.
However, a resistance value obtained using the channel of the MOS transistor is affected by a defect on a surface of a variable resistive element determined by the channel, and the size of the variable resistive element is decided by physical characteristics of the material forming the variable resistive element or by a circuit design. Therefore, to adjust the size of the variable resistive element by a desired degree, the circuit design or the concentration of a diffusion material used for the diffusion layer should be adjusted.
In addition, in a curve showing the relationship between a current flowing through the channel and a voltage (Vo−Vi) applied to the diffusion layers, the range of voltage having a linear portion is small. Thus, when the channel of the MOS transistor is used as the variable resistive element, a variable resistance range of the variable resistive element is unavoidably limited.